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In c++ write an assembler in which it will read a program written in HACK assembly language from an external file and ultimatley translate each line of code into the binary equivalent that can be run on the computer I built so based off the following hdl files Computer below others are in the images. CHIP Computer {     IN reset;      PARTS:     //Read-only memory (ROM) for instruction fetch     ROM32K(address=PC,out=instruction);     //Central Processing Unit (CPU) for instruction execution CPU(instruction=instruction,reset=reset,inM=outMemo,outM=CPUoutM,writeM=wM,addressM=adM,pc=PC);     //Memory for data storage and control logic     Memory(in=CPUoutM,load=wM,address=adM,out=outMemo);

In c++ write an assembler in which it will read a program written in HACK assembly language from an external file and ultimatley translate each line of code into the binary equivalent that can be run on the computer I built so based off the following hdl files Computer below others are in the images. CHIP Computer {     IN reset;      PARTS:     //Read-only memory (ROM) for instruction fetch     ROM32K(address=PC,out=instruction);     //Central Processing Unit (CPU) for instruction execution CPU(instruction=instruction,reset=reset,inM=outMemo,outM=CPUoutM,writeM=wM,addressM=adM,pc=PC);     //Memory for data storage and control logic     Memory(in=CPUoutM,load=wM,address=adM,out=outMemo);

Systems Architecture
Systems Architecture
7th Edition
ISBN:9781305080195
Author:Stephen D. Burd
Publisher:Stephen D. Burd
Chapter2: Introduction To Systems Architecture
Section: Chapter Questions
Problem 2VE: A(n) __________ is a storage location implemented in the CPU.
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In c++ write an assembler in which it will read a program written in HACK assembly language from an external file and ultimatley translate each line of code into the binary equivalent that can be run on the computer I built so based off the following hdl files Computer below others are in the images.

CHIP Computer {
    IN reset; 

    PARTS:

    //Read-only memory (ROM) for instruction fetch
    ROM32K(address=PC,out=instruction);

    //Central Processing Unit (CPU) for instruction execution
CPU(instruction=instruction,reset=reset,inM=outMemo,outM=CPUoutM,writeM=wM,addressM=adM,pc=PC);

    //Memory for data storage and control logic
    Memory(in=CPUoutM,load=wM,address=adM,out=outMemo);

    
}

CHIP Memory { } IN in [16], load, address [15]; OUT Out[16]; PARTS: //Determines whether to load data into RAM or screen based on //the load signal and address bit DMux (in=load, sel-address [14], a=ramload, b=skload); //Separates the screen load signal from the decision to load screen data DMux (in=skload, sel-address [13],a=sload, b=nothing); //Loads data into RAM and screen based on the selection RAM16K (in=in, load=ramload, address address [0..13], out=ramout); Screen (in-in, load=sload, address=address [0..12], out=screenout); //Deals with keyboard, ensures that bits in [0..12] are set to e Keyboard (out-kbd); //Determines keyboard input validity by checking bits in [0..12] Or8way (in=address [0..7], out=notkbd1); Orsway (in [0..4]=address [8..12], in[5..7]=false, out=notkbd2); or (a=notkbd1, b=notkbd2, out=notkbd); //Selects either keyboard input or zero based on the keyboard validity Mux16(a=kbd,b=false, sel-notkbd, out=kbdout); //Determine the output based on RAM, screen, and keyboard data Mux16(a=ramout, b-outsk, sel-address [14], out-out); Mux16(a=screenout, b=kbdout, sel=address [13], out-outsk);
Transcribed Image Text:CHIP Memory { } IN in [16], load, address [15]; OUT Out[16]; PARTS: //Determines whether to load data into RAM or screen based on //the load signal and address bit DMux (in=load, sel-address [14], a=ramload, b=skload); //Separates the screen load signal from the decision to load screen data DMux (in=skload, sel-address [13],a=sload, b=nothing); //Loads data into RAM and screen based on the selection RAM16K (in=in, load=ramload, address address [0..13], out=ramout); Screen (in-in, load=sload, address=address [0..12], out=screenout); //Deals with keyboard, ensures that bits in [0..12] are set to e Keyboard (out-kbd); //Determines keyboard input validity by checking bits in [0..12] Or8way (in=address [0..7], out=notkbd1); Orsway (in [0..4]=address [8..12], in[5..7]=false, out=notkbd2); or (a=notkbd1, b=notkbd2, out=notkbd); //Selects either keyboard input or zero based on the keyboard validity Mux16(a=kbd,b=false, sel-notkbd, out=kbdout); //Determine the output based on RAM, screen, and keyboard data Mux16(a=ramout, b-outsk, sel-address [14], out-out); Mux16(a=screenout, b=kbdout, sel=address [13], out-outsk);
CHIP CPU { } IN inM[16], instruction [16], // Instruction for execution reset; // M value input (M = contents of RAM[A]) OUT OutM[16], writem, addressM[15], pc [15]; // Signals whether to re-start the current // program (reset=1) or continue executing // the current program (reset=0). // M value output // write into M? // Address in data memory (of M) // address of next instruction PARTS: //Extracts instruction bit for addressing memory (A-in) Mux16(a=instruction, b=ALUout, sel-instruction [15], out=Ain); //Computes the inverse of instruction [15] Not (in=instruction [15], out=notinstruction); //Determines if the instruction implies loading A-register with a constant value or (a=notinstruction, b=instruction [5], out=loadA); //Controls bit di //Loads A-register based on the instruction and prepare A-value for ALU ARegister (in=Ain, load=loadA, out-Aout, out [e..14]=addressM); //Chooses between Aout and inM as ALU input based on the instruction [12] bit Mux16(a=Aout, b=inM, sel-instruction [12], out=AMout); //Prepares ALU control bits for various operations And (a=instruction [11], b=instruction [15], out=zx); And (a=instruction [10],b=instruction [15], out=nx); or (a=instruction [9],b=notinstruction, out=zy); or (a=instruction [8],b=notinstruction, out=ny); And (a=instruction [7],b=instruction [15], out=f); And (a=instruction [6],b=instruction [15], out=no); ALU (x=Dout, y=AMout, zx=zx, nx=nx, zy=zy, ny=ny,f=f, no=no, out-out, out=ALUout, zr=zero, ng=neg); //Determines if the instruction allows writing to memory And (a=instruction [15],b=instruction [3], out=writeM); //Controls bit d3 //Controls bit cl //Controls bit c2 //Controls bit c3 //Controls bit c4 //Controls bit c5 //Controls bit c6 //Loads D-register based on the instruction And (a=instruction [15],b=instruction [4], out=loadD); //Controls bit d2 DRegister (in=ALUout, load=loadD, out=Dout); //Determines the jump condition based on the instruction bits or (a=zero, b=neg, out=notpos); Not (in=notpos, out=pos); And (a=instruction[e],b=pos, out=j3); //Controls bit j3 And (a=instruction [1],b-zero, out=j2); //Controls bit j2 And (a=instruction [2],b=neg, out=j1); //Controls bit ji or (a=j1, b=j2, out=j12); or (a=j12, b=j3, out=j123); And (a=j123, b=instruction [15], out=jump); //Loads the program counter (PC) based on the jump condition PC (in-Aout, load-jump, reset=reset, inc=true, out [0..14]=pc);
Transcribed Image Text:CHIP CPU { } IN inM[16], instruction [16], // Instruction for execution reset; // M value input (M = contents of RAM[A]) OUT OutM[16], writem, addressM[15], pc [15]; // Signals whether to re-start the current // program (reset=1) or continue executing // the current program (reset=0). // M value output // write into M? // Address in data memory (of M) // address of next instruction PARTS: //Extracts instruction bit for addressing memory (A-in) Mux16(a=instruction, b=ALUout, sel-instruction [15], out=Ain); //Computes the inverse of instruction [15] Not (in=instruction [15], out=notinstruction); //Determines if the instruction implies loading A-register with a constant value or (a=notinstruction, b=instruction [5], out=loadA); //Controls bit di //Loads A-register based on the instruction and prepare A-value for ALU ARegister (in=Ain, load=loadA, out-Aout, out [e..14]=addressM); //Chooses between Aout and inM as ALU input based on the instruction [12] bit Mux16(a=Aout, b=inM, sel-instruction [12], out=AMout); //Prepares ALU control bits for various operations And (a=instruction [11], b=instruction [15], out=zx); And (a=instruction [10],b=instruction [15], out=nx); or (a=instruction [9],b=notinstruction, out=zy); or (a=instruction [8],b=notinstruction, out=ny); And (a=instruction [7],b=instruction [15], out=f); And (a=instruction [6],b=instruction [15], out=no); ALU (x=Dout, y=AMout, zx=zx, nx=nx, zy=zy, ny=ny,f=f, no=no, out-out, out=ALUout, zr=zero, ng=neg); //Determines if the instruction allows writing to memory And (a=instruction [15],b=instruction [3], out=writeM); //Controls bit d3 //Controls bit cl //Controls bit c2 //Controls bit c3 //Controls bit c4 //Controls bit c5 //Controls bit c6 //Loads D-register based on the instruction And (a=instruction [15],b=instruction [4], out=loadD); //Controls bit d2 DRegister (in=ALUout, load=loadD, out=Dout); //Determines the jump condition based on the instruction bits or (a=zero, b=neg, out=notpos); Not (in=notpos, out=pos); And (a=instruction[e],b=pos, out=j3); //Controls bit j3 And (a=instruction [1],b-zero, out=j2); //Controls bit j2 And (a=instruction [2],b=neg, out=j1); //Controls bit ji or (a=j1, b=j2, out=j12); or (a=j12, b=j3, out=j123); And (a=j123, b=instruction [15], out=jump); //Loads the program counter (PC) based on the jump condition PC (in-Aout, load-jump, reset=reset, inc=true, out [0..14]=pc);
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